論文 - 石原 亨
-
An Impact of Within-Die Variation on Supply Voltage Dependence of Path Delay 査読有り
Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
Proc. International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU) 2013年3月
-
Analysis and comparison of XOR cell structures for low voltage circuit design. 査読有り
Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
Proc. International Symposium on Quality Electronic Design (ISQED) 頁： 703 - 708 2013年3月
-
A flexible structure of standard cell and its optimization method for near-threshold voltage operation 査読有り
Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
Proc. the 30th International IEEE Conference on Computer Design (ICCD) 頁： 235 - 240 2012年10月
-
I/O aware task scheduling for energy harvesting embedded systems with PV and capacitor arrays 査読有り
Kyungsoo Lee, Tohru Ishihara
Proc. IEEE 10th Symposium on Embedded Systems for Real-time Multimedia (ESTIMedia) 頁： 48 - 55 2012年10月
-
Loop instruction caching for energy-efficient embedded multitasking processors 査読有り
Ji Gu, Tohru Ishihara, Kyungsoo Lee
Proc. IEEE 10th Symposium on Embedded Systems for Real-time Multimedia (ESTIMedia) 頁： 97 - 106 2012年10月
-
A Case Study of Energy-efficient Loop Instruction Cache Design for Embedded Multitasking Systems 査読有り
Ji Gu, Tohru Ishihara
Proc. the 1st International Conference on Smart Grids and Green IT Systems (SMARTGREENS) 頁： 197 - 202 2012年4月
-
A Dynamic Reconfiguration Technique for PV and Capacitor Arrays to Improve the Efficiency in Energy Harvesting Embedded Systems 査読有り
Kyungsoo Lee, Tohru Ishihara
Proc. the 1st International Conference on Smart Grids and Green IT Systems (SMARTGREENS) 頁： 175 - 182 2012年4月
-
Processor energy characterization for compiler-assisted software energy reduction 査読有り
L. Gauthier; T. Ishihara
Journal of Electrical and Computer Engineering - 英語 2012年1月
-
Implementation of Stack Data Placement and Run Time Management Using a Scratch-Pad Memory for Energy Consumption Reduction of Embedded Applications 査読有り
Lovic Gauthier, Tohru Ishihara
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences 94-A 巻 ( 12 ) 頁： 2597-2608 2011年12月
-
ＲＴＯＳのハードウェア化によるソフトウェアベースＴＣＰ／ＩＰ処理の高速化と低消費電力化 査読有り
丸山修孝;石原亨;安浦寛人
電子情報通信学会論文誌 A J94-A 巻 ( 9 ) 頁： 692 - 701 2011年9月
-
Unified Gated Flip-Flops for Reducing the Clocking Power in Register Circuits 査読有り
Takumi Okuhira, Tohru Ishihara
Proc. the 21st International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) 頁： 237 - 246 2011年9月
-
An integrated optimization framework for reducing the energy consumption of embedded real-time applications 査読有り
Hideki Takase, Gang Zeng, Lovic Gauthier, Hirotaka Kawashima, Noritoshi Atsumi, Tomohiro Tatematsu, Yoshitake Kobayashi, Shunitsu Kohara, Takenori Koshiro, Tohru Ishihara, Hiroyuki Tomiyama, Hiroaki Takada
Proc. International Symposium on Low Power Electronics and Design (ISLPED) 頁： 271 - 276 2011年8月
-
Software-Level Instruction-Cache Leakage Reduction Using Value-Dependence of SRAM Leakage in Nanometer Technologies 査読有り
Maziar Goudarzi, Tohru Ishihara, Hamid Noori
Transactions on High-Performance Embedded Architectures and Compilers 3 巻 頁： 275-299 2011年3月
-
Developing an integrated verification and debug methodology 査読有り
Akitoshi Matsuda, Tohru Ishihara
Proc. Design, Automation and Test in Europe (DATE) 頁： 503 - 504 2011年3月
-
A Multi-Performance Processor for Reducing the Energy Consumption of Real-Time Embedded Systems 査読有り
Tohru ISHIHARA
IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences 93-A 巻 ( 12 ) 頁： 2533-2541 2010年12月
-
SRAM leakage reduction by row/column redundancy under random within-die delay variation 査読有り
M. Goudarzi; T. Ishihara
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 18 巻 ( 12 ) 頁： 1660 - 1671 2010年12月
-
Compiler assisted energy reduction techniques for embedded multimedia processors 招待有り 査読有り
Lovic Gauthier, Tohru Ishihara
Proc. the 2nd APSIPA Annual Summit and Conference 頁： 27 - 36 2010年12月
-
Placing Static and Stack Data into a Scratch-Pad Memory for Reducing the Energy Consumption of Multi-task Applications 査読有り
Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
Proc. the Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI) 頁： 7 - 12 2010年10月
-
Minimizing inter-task interferences in scratch-pad memory usage for reducing the energy consumption of multi-task systems 査読有り
Lovic Gauthier, Tohru Ishihara, Hideki Takase, Hiroyuki Tomiyama, Hiroaki Takada
Proc. the 2010 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES) 頁： 157 - 166 2010年10月
-
Code and data placement for embedded processors with scratchpad and cache memories 査読有り
Y. Ishitobi; T. Ishihara; H. Yasuura
Journal of Signal Processing Systems 60 巻 ( 2 ) 頁： 211 - 224 2010年8月