Faculty Profiles - SHIMADA Hajime

Papers - SHIMADA Hajime

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Enhancing Detection of Malicious Traffic through FPGA-based Frequency Transformation and Machine Learning Reviewed

Zhenguo Hu, Hirokazu Hasegawa, Yukiko Yamaguchi, and Hajime Shimada,

IEEE Access Vol. 12 page： 2648 - 2659 2024.1

Malware Self-Supervised Graph Contrastive Learning with Data Augmentation Reviewed

Yun Gao, Hirokazu Hasegawa, Yukiko Yamaguchi, and Hajime Shimada,

International Journal On Advances in Security Vol. 16 ( 3 and 4 ) page： 116 - 125 2023.12

学内向けWi-Fi環境観測システムの構築とその応用 Reviewed

Vol. 27 ( 1 ) page： 157 - 166 2023.11

Realtime Malicious Traffic Detection targeted for TCP Out-of-Order Packets based on FPGA Reviewed

Zhenguo Hu, Hirokazu Hasegawa, Yukiko Yamaguchi, and Hajime Shimada

IEEE Access Vol. 11 page： 112212 - 112222 2023.10

Androidアプリの自動リンクにおける悪意のあるリンク生成リスクの検討 Reviewed

辻知希, 嶋田創, 山口由紀子, 長谷川皓一

情報処理学会論文誌 Journal of Information Processing Vol. 64 ( 5 ) page： 1041 - 1052 2023.5

Malware Detection by Control-Flow Graph Level Representation Learning with Graph Isomorphism Network Reviewed

Yun Gao, Hirokazu Hasegawa, Yukiko Yamaguchi, and Hajime Shimada,

IEEE Access Vol. 10 page： 111830 - 111841 2022.10

Malware Detection Using LightGBM With a Custom Logistic Loss Function Reviewed International journal

Gao Yun, Hasegawa Hirokazu, Yamaguchi Yukiko, Shimada Hajime

IEEE ACCESS Vol. 10 page： 47792 - 47804 2022

WAF Signature Generation from Real-Time Information on the Web using Similarity to CVE Invited Reviewed

Masahito Kumazaki, Yukiko Yamaguchi, Hajime Shimada, and Hirokazu Hasegawa

International Journal On Advances in Security Vol. 14 page： 26-36 2021.12

Automatic Mapping of Threat Information to Adversary Techniques Using Different Datasets Reviewed

Otgonpurev Mendsaikhan, Hirokazu Hasegawa, Yukiko Yamaguchi, and Hajime Shimada

nternational Journal On Advances in Security Vol. 14 ( 1 and 2 ) page： 37 - 47 2021.12

Identification of Cybersecurity Specific Content Using Different Language Models Reviewed

Otgonpurev Mendsaikhan, Hirokazu Hasegawa, Yukiko Yamaguchi, Hajime Shimada, and Enkhbold Bataa

IPSJ Journal of Information Processing Vol. 28 page： 623-632 2020.9

Quantifying the Significance and Relevance of Cyber-Security Text through Textual Similarity and Cyber-Security Knowledge Graph Reviewed

Otgonpurev Mendsaikhan, Hirokazu Hasegawa, Yukiko Yamaguchi, and Hajime Shimada

IEEE Access page： 177041-177052 2020.9

文字列構造に着目したWebアプリケーションに対する攻撃のアノマリ検知手法 Reviewed

鐘本楊, 青木一史, 三好潤, 嶋田創, 高倉弘喜

情報処理学会論文誌 Vol. 1260 page： 2223-2233 2019.12

Using Seq2Seq Model to Detect Infection Focusing on Behavioral Features of Processes Reviewed

Shun Tobiyama, Yukiko Yamaguchi, Hirokazu Hasegawa, Hajime Shimada, Mitsuaki Akiyama, Takeshi Yagi

Vol. 60 ( 9 ) 2019.9

Language：English Publishing type：Research paper (scientific journal)

Sophisticated cyber-attacks intended to earn money or steal confidential information, such as targeted attacks, have become a serious problem. Such attacks often use specially crafted malware, which utilizes the art of hiding such as by process injection. Thus, preventing intrusion using conventional countermeasures is difficult, so a countermeasure needs to be developed that prevents attackers from reaching their ultimate goal. Therefore, we propose a method for estimating process maliciousness by focusing on process behavior. In our proposal, we first use one Seq2Seq model to extract a feature vector sequence from a process behavior log. Then, we use another Seq2Seq model to estimate the process maliciousness score by classifying the obtained feature vectors. By applying Seq2Seq models stepwise, our proposal can compress behavioral logs and extract abstracted behavioral features. We present an experimental evaluation using logs when actual malware is executed. The obtained results show that malicious processes are classified with a highest Areas Under the Curve (AUC) of 0.979 and 80% TPR even when the FPR is 1%. Furthermore, the results of an experiment using the logs when simulated attacks are executed show our proposal can detect unknown malicious processes that do not appear in training data.

DOI： 10.2197/ipsjjip.27.545

Detecting Successful Attacks against Web Application based-on Attack Code Emulation Reviewed

Yo Kanemoto, Kazufumi Aoki, Jun Miyoshi, Hajime Shimada, and Hiroki Takakura

IPSJ Journal of Information Processing Vol. 60 ( 3 ) page： 945-955 2019.3

Language：Japanese Publishing type：Research paper (scientific journal)

Security appliances such as WAFs and IDSs contribute to detecting threats of web attacks greatly. However, it requires much time when we discover critical incident related alerts from massive alerts of security appliances. In this research, we propose a system that verifies the criticalness of alerts based on an indicator of attacks. The proposed system emulates exploit code to extract an indicator of succeeded attacks. By matching the indicator with HTTP response content, we can confirm success or failure of the attack which is directly connected to importance of the alert. We show an effectiveness of the system through accuracy/performance evaluation, and case studies.

DVFS使用下における余剰時間を利用した最上位キャッシュ切替えによるキャッシュ消費エネルギーの削減 Reviewed

齋藤郁, 小林良太郎, 嶋田創b

報処理学会論文誌 Vol. 59 ( 3 ) page： 1061-1076 2018.3

NIDS評価用データセット : Kyoto 2016 Datasetの作成 Reviewed

多田竜之介, 小林良太郎, 嶋田創, 高倉弘喜

情報処理学会論文誌 Journal of Information Processing Vol. 58 ( 9 ) page： 1450-1463 2017.9

A Curriculum Analysis for Information Security Curriculum Development Focusing on Technical Competencies Reviewed

YoungKyung Son , Yukiko Yamaguchi , Hajime Shimada , Hiroki Takakura

Vol. 58 ( 5 ) page： 1163 - 1174 2017.5

Language：Japanese Publishing type：Research paper (scientific journal)

Threats to information security are increasing rapidly and requests of the human resources who acquire high technology are also increasing. Japanese government announced the new policy to solve this problem by expanding a curriculum of information security at higher education institutions. The curriculum should be practical and provide technical competencies required on actual field. This study aimed at the development of a curriculum by adopting the information security competencies defined by NICE (The National Initiative for Cybersecurity Education) which is a under organization of the American National Institute of Standards and Technology. In this paper, we classified 783 NICE technical competencies into 62 items. Moreover, we investigated the curriculum among Japanese and Korean universities and analyzed them by a correlation analysis with NICE technical competencies.

ディレクトリサービス情報とトラフィックデータによるACL自動生成システム Reviewed

長谷川皓一, 山口由紀子, 嶋田創, 高倉弘喜

電子情報通信学会論文誌 Vol. J100-D ( 3 ) page： 353-364 2017.3

Improvement of Data Utilization Efficiency for Cache Memory by Compressing Frequent Bit Sequences, Reviewed

Ryotaro Kobayashi, Ikumi Kaneko, and Hajime Shimada

IEICE Transactions on Electronics Vol. E99-C ( 8 ) page： 936-946 2016.8

Energy Reduction of BTB by focusing on Number of Branches per Cache Line Reviewed

Ryotaro Kobayashi, Kaoru Saito, and Hajime Shimada

IPSJ Journal of Information Processing Vol. 24 ( 3 ) page： 492-503 2016.6

A Countermeasure Support System against Incidents caused by Targeted Attacks Reviewed

Hirokazu Hasegawa, Yukiko Yamaguchi, Hajime Shimada, Hiroki Takakura

Vol. 57 ( 3 ) page： 1-13 2016.3

Language：Japanese Publishing type：Research paper (scientific journal)

Recently, with rapid increase of targeted attacks, serious damages have been caused. In addition
to the conventional countermeasures which prevent from the intrusion of malwares, another new methods
have attracted much attention to reducing the damage caused by the infection. It is considered that proper
segmentation on an enterprise network and access control among the segments are one of the most effective
countermeasures. The activity of malwares can be suppressed, by prohibiting unnecessary communication
in the network. The record of the communication like the violation of the access control helps us to detect
malwares. From these benefits, we can easily take an action, e.g., the isolation of infected hosts. However,
it should be anticipated that the action judged only by a network administrator may affect on enterprise's
business. In this paper, we propose a countermeasure support system which enables swift and proper action
against the incident. The system generates 9 candidates of the access control. By evaluating the candidates
based on the effectiveness against malicious activities and the impact on business, the most suitable countermeasure
is recommended to a network administrator. Therefore, he/she can take feasible action with swift
and proper response.

英文論文誌小特集号「Special Section on Low-Power and High-Speed Chips」発刊によせて Invited

嶋田創

電子情報通信学会エレクトロニクスソサエティ NEWS LETTER Vol. 161 page： 19 2015.7

Language：Japanese

電池駆動される情報機器の爆発的な普及により、そのような機器に用いられる半導体回路やそれを用いて実現したプロセッサの消費電力削減は、引き続き、重要な課題となっています。また、近年では化石燃料消費による二酸化炭素排出の削減のため、サーバ用プロセッサにおいても電力効率の向上は重要な課題となっている。この分野の研究を論文として発表する場として、このたび、英文論文誌小特集号「Special Section on Low-Power and High-Speed Chips」を発刊することになり、厳正な編集・査読作業の結果、本特集号には6編の一般論文、1編のショートノートが採録されることとなった。

BTB Energy Reduction by Focusing on Useless Accesses Reviewed

Y. Shimomura, H. Yamamoto, H. Usui, R. Kobayashi, and H. Shimada

IEICE Transactions on Electronics Vol. E98-C ( 7 ) page： 569-579 2015.7

Language：English Publishing type：Research paper (scientific journal)

Modern processors use Branch Target Buffer (BTB) to relax control
dependences. Unfortunately, the energy consumption of the BTB is
high. In order to effectively fetch instructions, it is necessary to perform a
branch prediction at the fetch stage, regardless of whether the fetched instruction
is a branch or a nonbranch. Therefore, the number of accesses to
the BTB is large, and the energy consumption of the BTB is high. However,
accesses from nonbranches to the BTB waste energy.
In this paper, we focus on accesses from nonbranches to the BTB,
which we call useless accesses from a viewpoint of power. For reducing
energy consumption without performance loss, we present a method
that reduces useless accesses by using information that indicates whether a
fetched instruction is a branch or not. To realize the above approach, we
propose a branch bit called B-Bit. A B-Bit is associated with an instruction
and indicates whether it is a branch or not. A B-Bit is available at the beginning
of the fetch stage. If a B-Bit is "1" signifying a branch, the BTB is
accessed. If a B-Bit is "0" signifying a nonbranch, the BTB is not accessed.
The experimental results show that the number of accesses to the BTB can
be reduced by 70.7% and the total energy consumption can be reduced by
61.4% without performance loss.

Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing Reviewed

H. Konoura, D. Alnajjar, Y. Mitsuyama, H. Shimada, K. Kobayashi, H. Kanbara, H. Ochi, T. Imagawa, K. Wakabayashi, M. Hashimoto, T. Onoye, and H. Onodera

IEICE Trans. on Fundamentals of Electronics, Communications and Computer Sciences Vol. E97-A ( 12 ) page： 2518-2529 2014.12

一時/永久故障に自動再構成で対応する高信頼プロセッサ Invited Reviewed

嶋田創, 姚駿

日本信頼性学会誌「信頼性」 Vol. 35 ( 8 ) page： 459 2013.12

Reducing Cache Hardware by Focusing on Data Redundancy Reviewed

Ryotaro Kobayashi, Daisuke Matsukawa, Yoshio Shimomura, Hiroya Ochiai, Hajime Shimada

Vol. 133 ( 8 ) page： 1597-1606 2013.8

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Papers - SHIMADA Hajime